Published new version of the project Vortexdeveloping open GPGPU based on the RISC-V instruction set architecture, designed to perform parallel computing using the OpenCL API and the SIMT (Single Instruction, Multiple Threads) execution model. The project can also be used in research in the field of 3D graphics and in the development of new GPU architectures. Diagrams, descriptions of hardware units in Verilog language, simulator, drivers and related design documentation spread licensed under Apache 2.0.
GPGPU is based on a standard RISC-V ISA, extended by some additional instructions, necessary to support GPU functions and thread control. At the same time, changes in the RISC-V instruction set architecture are kept to a minimum and, whenever possible, existing vector instructions are used. A similar approach is used in the RV64X project, which also develops an open GPU based on RISC-V technologies.
Main features of Vortex:
- Supports 32- and 64-bit RISC-V instruction set architectures RV32IMF and RV64IMAFD.
- Configurable number of cores, task blocks (warps) and threads.
- Configurable number of ALUs, FPUs, LSUs and SFUs per core.
- Adjustable pipeline issue width.
- Optional shared memory and L1, L2 and L3 caches.
- OpenCL 1.2 specification support.
- Possibility of implementation based on FPGA Altera Arria 10, Altera Stratix 10, Xilinx Alveo U50, U250, U280 and Xilinx Versal VCK5000.
- Advanced instructions: “tex” to speed up texture processing, vx_rast to control rasterization, vx_rop to handle fragments, depth and transparency, vx_imadd to perform multiply and add operations, vx_wspawn, vx_tmc and vx_bar to activate instruction edges and wavefronts , a set of threads executed in parallel by the SIMD Engine), vx_split and vx_join.
- Support for intermediate representation of SPIR-V shaders is implemented via translation to OpenCL.
- For application development it is offered toolsincluding options adapted to work with Vortex PoCL (compiler and runtime OpenCL), LLVM/Clang, GCC and Binutils.
- Simulation of chip operation is supported using Verilator (Verilog simulator), RTLSIM (RTL simulation) and SimX (software simulation).
For graphics using Vortex technologies develops open GPU Skybox, which supports the Vulkan graphics API. The Skybox prototype, created on the basis of the Altera Stratix 10 FPGA and including 32 cores (512 threads), made it possible to achieve a fill performance of 3.7 gigapixels per second (29.4 gigatransactions per second) at a frequency of 230 MHz. It is noted that this is the first open GPU with software and hardware implementation that supports Vulkan.
Among the changes in Vortex 2.1:
- Added spawn_taskgroups API for launching kernels that use local memory and support setting memory barriers.
- A new extension has been proposed for creating relocatable binary kernels.
- Added vx_mem_reserve, vx_mem_access and vx_mem_address calls to the memory management API.
- Added new runtime API vx_check_occupancy.
- An option has been added to the GPU driver to run OpenCL tests on the local GPU.
- Added OpenCL tests that use local memory (psum, sgemm2, sgemm3).
- Added editions of libc and librt libraries specially adapted for Vortex.
- Added support for merging adjacent free memory blocks (memory coalescing).
- The microarchitecture has been optimized.
- Added a new build script that separates the source files from the build directory.
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